Is this a finished, ready-to-fly radar system?

No. The project is marked alpha status with some features still in progress. It's a hardware and firmware platform meant for building and experimenting, not a certified turnkey sensor.

What license covers the project?

Hardware design files (schematics, PCB layouts, BOM, mechanical drawings) use the CERN-OHL-P license. Software and firmware (FPGA code, STM32 firmware, Python GUI) use the MIT license.

What tools and skills do I need to build one?

You need PCB assembly experience, Python 3.8+ for the GUI, and Vivado if you want to modify the FPGA signal processing. Basic radar theory helps for tuning and calibration.

What's the difference between the two hardware variants?

AERIS-10N (Nexus) has an 8x16 patch antenna array and a 3 km range. AERIS-10E/X (Extended) uses a 32x16 slotted waveguide array with GaN power amplifiers for a 20 km range. Both operate at 10.5 GHz with ±45° electronic beam steering.

Where do I find assembly instructions?

Production files, BOM/CPL data, and schematics are under `/4_Schematics and Boards Layout/`, and mechanical drawings are in `/8_Utils/Mechanical_Drawings`. There is no separate step-by-step assembly guide beyond these files as of now.

How do I report bugs or ask technical questions?

Open a GitHub issue on the repo so the discussion is visible to the community. Collaboration or business inquiries go through the maintainer's email listed in the README.

PLFM_RADAR: Open-source 10.5 GHz phased array

AERIS-10 (PLFM_RADAR) is an open-source pulse linear frequency modulated (LFM) phased array radar operating at 10.5 GHz. It ships as a full hardware and software stack: schematics, PCB layouts, FPGA VHDL, STM32 firmware, and a Python GUI. It targets people who want to build and experiment with a real radar system rather than buy a closed commercial unit: university researchers, drone developers, and advanced RF/SDR hobbyists.

The project comes in two hardware variants. AERIS-10N (Nexus) uses an 8x16 patch antenna array for a 3 km range, while AERIS-10E (Extended) uses a 32x16 dielectric-filled slotted waveguide array with GaN power amplifiers for a 20 km range. Both share the same signal chain: DAC-generated chirps, mixer up/down conversion, ADAR1000 phase shifters for beam steering, and an FPGA that handles pulse compression, Doppler FFT, MTI, and CFAR detection. An STM32F7 microcontroller manages power sequencing, peripheral configuration, GPS/IMU integration, and a stepper motor for mechanical scanning.

Key features

Full open-source stack: schematics, PCB layouts, BOM/CPL files, FPGA code, firmware, and GUI are all published
Two range variants: 3 km (AERIS-10N, patch array) and 20 km (AERIS-10E/X, slotted waveguide array with GaN PAs)
Electronic beam steering: ±45° in elevation and azimuth via ADAR1000 phase shifters, plus 360° mechanical scan
On-board FPGA processing: pulse compression, Doppler FFT, MTI, and CFAR run on an XC7A50T FPGA
Hybrid AGC and thermal monitoring: closed-loop Idq/Vg calibration per PA channel and fan control based on thermistor readings
GPS/IMU integration: position and attitude correction feed into the GUI's map-based target display
Python GUI: real-time target plotting, map integration, and radar control

Ideal use cases

This project fits people who want to learn or research phased array radar at the hardware level: university labs building radar coursework or research platforms, drone companies prototyping detect-and-avoid or perimeter sensing, and makers with RF/PCB assembly experience who want a hackable 10.5 GHz radar rather than a black-box product.

It is not a fit if you need a certified, production-ready sensor out of the box. The project is explicitly in alpha status with features still in progress, and there's no standalone assembly guide beyond schematics and production files. You also need real hardware skills: PCB assembly, RF calibration, and FPGA/Vivado tooling. If you just want radar data without building anything, look elsewhere.

Installation

There's no software "install" in the traditional sense since this is primarily a hardware project with supporting firmware and GUI code. To get started:

Prerequisites

Basic radar principles knowledge
PCB assembly experience for the hardware build
Python 3.8+ for the GUI
Vivado for FPGA development/modifications

Hardware assembly steps

Order PCBs using production outputs in:

/4_Schematics and Boards Layout/4_7_Production Files

Source components using the BOM/CPL files in the same folder.
Assemble using the schematics in:

/4_Schematics and Boards Layout/4_6_Schematics

Choose the antenna array files matching your target variant (Nexus or Extended).
Build the enclosure using mechanical drawings in /8_Utils/Mechanical_Drawings.

Documentation, including a hardware bring-up guide, architecture notes, and test reports, is published via GitHub Pages under /docs. Generated files from simulations or FPGA builds should go into the gitignored 5_Simulations/generated/ or 9_Firmware/9_2_FPGA/reports/ folders rather than the repo root, per the project's file placement policy.